Development Of Small-Sized Pixel Structures For High-Resolution Cmos Image Sensors

We present our studies on small-sized pixel structures for high-resolution CMOS image sensors. To minimize the number of pixel components, single-transistor pixel and 2T pixel architecture were proposed. To deal with crosstalk between pixels, MOS capacitor deep trench isolation (CDTI) was integrated. CDTI-integrated pixel allows better achievements in dark current and full-well capacity in comparison with the configuration integrating oxide-filled deep trench isolation (DTI). To improve quantum efficiency (QE) and minimize optical crosstalk, back-side illumination (BSI) was developed. Also, vertical photodiode was proposed to maximize its charge-collection region. To take advantages of these structures/technologies, we developed two pixel options (P-type and N-type) combining CDTI or DTI, BSI and vertical photodiode. All the presented pixel structures were designed in 1.4 mu m-pitch sensor arrays, fabricated and tested.