Layout-based test coverage verification for high-reliability devices
IEEE Transactions on Semiconductor Manufacturing(2017)
摘要
Test quality is critical to eliminate test escapes and to achieve high-reliability large-scale integrated (LSI) devices. This paper proposes a new concept called “physical test coverage” to verify test coverage based on the physical layout of LSI circuits. The physical test coverage is calculated as the ratio between the critical area of all wires in a device and that of wires undetected by LSI te...
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关键词
Large scale integration,Circuit faults,Layout,Reliability,Quality control,Logic circuits
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