Effects of varying the through silicon via liners thickness on their hoop stresses and deflections

The Journal of Engineering(2017)

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摘要
Through silicon via (TSV) interconnect reliability is a problem in electronic packaging. The authors address the insertion losses, deflections which can result to separation of TSV layers and hoop stresses. These problems are due to different coefficient of thermal expansion between materials. The authors propose a robust methodology for (TSV) liners in this paper which in turn solves the reliabil...
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关键词
three-dimensional integrated circuits,integrated circuit interconnections,thermal expansion,S-parameters,integrated circuit design,integrated circuit reliability
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