Robustness aspects of 600V GaN-on-Si based power cascoded HFET

Deepak Veereddy,Tim McDonald, John Ambrus, Alfonso Diy, Stuart Cardwell,Bhargav Pandya,Reenu Garg,Mohamed Imam

2016 IEEE 4th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)(2016)

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摘要
The Safe Operating Area (SOA) characteristics of 600 V rated GaN-on-Si based cascode power devices in the Forward Bias (FB) and Short Circuit (SC) test conditions were evaluated in this study. The results from FBSOA tests at ≤ 150 °C device channel temperatures in the linear mode operation demonstrated reliable device operation with negligible parametric drifts. However, the test to destruction FBSOA measurements performed at elevated channel temperatures revealed that the GaN MIS HFET's gate dielectric degradation in the cascode structure is the failure root cause and a theory is presumed to explain the pertinent failure mechanism. Similarly, the destructive SC tests on the cascode GaN devices were conducted that displayed very short withstand times. Through this work, we show that the SC withstand times of GaN devices can be improved by design modifications which come with a Figure of Merit compromise.
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关键词
Gallium Nitride (GaN),Silicon (Si),Hetero-structure Field Effect Transistor (HFET),saturation region,cascode,Forward Biased Safe Operating Area (FBSOA),thermal impedance,short circuit
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