A Power-adjustable Fully-integrated CMOS Optical Receiver for Multi-rate Applications

A power-adjustable fully-integrated CMOS optical receiver with multi-rate clock-and-data recovery circuit is presented in standard 65-nm CMOS technology. With supply voltage scaling, key features of the optical receiver such as bandwidth, power efficiency, and optical sensitivity can be automatically optimized according to the bit rates. The prototype receiver has -23.7 dBm to -15.4 dBm of optical sensitivity for 10(-9) bit error rate with constant conversion gain around all target bit rates from 1.62Gbps to 8.1 Gbps. Power efficiency is less than 9.3 pJ/bit over all operating ranges.