Low Power 8-Bit Alu Design Using Full Adder And Multiplexer

Arithmetic logic unit (ALU) is an important part of microprocessor. In digital processor logical and arithmetic operation executes using ALU. In this paper we describes 8-bit ALU using low power 11-transistor full adder (FA) and Gate diffusion input (GDI) based multiplexer. By using FA and multiplexer, we have reduced power and delay of 8-bit ALU as compare to existing design. All design were simulated using Tanner EDA tool v15.0 in 32nm BSIM4 technology. Performance analyses were done with respect to power, delay and power delay product.