Reduction of hysteresis in MoS2 transistors using pulsed voltage measurements

2016 74th Annual Device Research Conference (DRC)(2016)

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摘要
Transistors based on atomically thin two-dimensional (2D) materials like MoS 2 have attractive properties for applications in low-power electronics. However, in practice their electrical measurements often exhibit hysteresis [1,2], masking their intrinsic behavior. Here, we use pulsed measurements to decrease hysteresis, examine charge trapping, and extract device parameters (like mobility) that represent the “true” behavior of 2D devices. Hysteresis is minimized even with modest ≤ 1 ms pulses, and the extracted mobility converges to a unique value, unlike the less reliable conventional methods which rely either on forward or reverse DC sweeps.
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关键词
transistors,pulsed voltage measurements,2D materials,low-power electronics,electrical measurements,charge trapping,2D devices,forward DC sweeps,reverse DC sweeps,MoS2
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