Development Of A Radiation-Hardened Standard Cell Library For 65nm Cmos Technology

2016 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC)(2016)

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摘要
We have developed a radiation-hardened standard cell library for space applications based on the commercial 65nm CMOS technology process. The standard cells are designed using some radiation-hardened (RH) techniques, and the effects of these RH approaches have been validated. Also this 65nm CMOS RH standard cell library has been characterized to support the verilog to GDSII design flow, and the designed radiation tolerant features of this library are: TID > 500 Krad(Si), SEL > 100 MeV.cm(2)/mg, SEU > 37 MeV. cm(2)/mg.
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关键词
radiation-hardened standard cell library,RH techniques,space applications,CMOS technology process,CMOS RH standard cell library,Verilog,GDSII design flow,total ionizing dose,TID,single event latchup,SEL,single event upset,SEU,size 65 nm
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