A DC-DC converter with adaptive clock control

2015 International SoC Design Conference (ISOCC)(2015)

引用 1|浏览22
暂无评分
摘要
In this paper, the DC-DC converter for adaptive clock control is presented. The proposed adaptive clock control scheme generates a leading edge blanking (LEB) time which is controlled by load current. The DC-DC converter achieves a high efficiency of more than 90% using supply voltages of 1.8 ~ 3.6V and load currents of 5 ~ 35mA.
更多
查看译文
关键词
leading edge blanking,PWM,DC-DC converter,current sensing
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要