Simulation Model to Predict BER Based on S-Parameters of High-Speed Interconnects

L. Pizano-Escalante,O. Longoria-Gandara,R. Parra-Michel,F. Peña-Campos

IEEE Design & Test（2019）

引用 5|浏览9

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摘要

Editor’s note: This work aims to predict bounds on bit-error-rate performance of highspeed interconnects. The novelty lies in the characterization of timing jitter to achieve more accurate modeling of such interconnects. —Sudeep Pasricha, Colorado State University

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关键词

Timing jitter,Three-dimensional displays,Signal to noise ratio,Integrated circuit interconnections,Receivers,Solid modeling

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