FinFET-based Monolithic 3D+ with RRAM Array and Computing in Memory SRAM for Intelligent IoT Chip Application

We report heterogeneously integrated sub-40nm epi-like monolithic 3DIC with vertical ReRAM and memory computing (NMC) circuit. High driving current multi-channel UTB-MOSFETs (3.3/1.4 mA$/\mu \mathrm {m}$ for N/P FETs) was realized by low thermal budget super-CMP-planarized visible laser-crystallized epi-like Si channel and CO 2 far-infrared laser annealing (CO 2 -FIR-LA) activation technologies that enable driving 20nm 4-layer vertical ReRAM (Set/Reset $ \lt 1.2\mathrm {V}/1.8\mathrm {V}$, 3-bits/cell). Furthermore, the ultra-low threshold voltage of NC-FinFETs and the differential output of SRAM readout enable 50 +% area reduction in the near-memory computing circuitry. The unique TSV-free monolithic $3\mathrm {D} ^{+}$ IC process provides the superiority in 3D hetero-integration to realize low cost, small footprint, fully functionalized 3D IoTs chip.