Novel Low-Complexity Low-Latency Orthogonal Frequency Division Multiplexing Transmitter

Traditional orthogonal frequency division multiplexing (OFDM) transmitter is implemented by exploiting inverse fast Fourier transform (IFFT), up-sampling, and low pass shaping filter (LPSF) modules, which occupy a large number of hardware resources and severely lower down the operation speed. To address these limitations, we propose a novel OFDM transmitter architecture, by which the aforementioned modules can be discarded and replaced with some simple switches. In the proposed architecture, direct digital synthesis (DDS) method is employed to generate digital sub-carriers and to transform OFDM data from frequency domain to time domain. Through some sophisticated simplifications, the proposed architecture can avoid using multipliers and remarkably save hardware resources. Finally, comparative experiments are carried out on field programmable gate array (FPGA) platform which demonstrates that our DDS-based architecture saves more than half of the hardware resources and doubles the achievable maximum frequency compared with traditional structure.