A digitally calibrated impedance booster circuit for neural recording systems

An On-chip digitally calibrated impedance boosting technique based on negative-impedance-converter (NIC) is presented to improve the input impedance of AC-Coupled neural amplifiers. The technique relies on an impedance sensor circuit that measures the input impedance of the neural amplifier and dynamically matches it to the impedance of the NIC. Simulation results show that the boosted input impedance is much higher than 80 GO at 100 Hz. In addition, the boosting technique has minimal impact on noise; where the input referred power spectral density (PSD) noise is 66 nV/√Hz at bandwidth of 0.2 Hz to 100 Hz. The overall neural amplifier and NIC, designed on 130 nm CMOS technology, consumes 14.8 μA at 1 V supply.