TiReX: Tiled Regular eXpression Matching Architecture

2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)(2018)

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摘要
Regular Expressions (RE) are widely used to find patterns among data, like in genomic markers research for DNA analysis, deep packet inspection or signature-based detection for network intrusion detection system. This paper proposes a novel and efficient RE matching architecture for FPGAs, based on the concept of matching core. RE can be software-compiled into sequences of basic matching instructions that a matching core runs on input data, and can be replaced to change the RE to be matched. This architecture can easily scale up with the available resources and is customizable to multiple usage scenarios. We ran several experiments and compared the obtained results with a software solution, reaching speedups over 100×, while running at 130MHz, over a Flex-based matching application running on an Intel i7 CPU at 2.8GHz.
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关键词
Regular-Expressions,FPGA,Multicore,Reconfigurable,ISA
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