Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience).
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(2018)
摘要
We present cross-layer exploration for architecting resilience, a first of its kind framework which overcomes a major challenge in the design of digital systems that are resilient to reliability failures: achieve desired resilience targets at minimal costs (energy, power, execution time, and area) by combining resilience techniques across various layers of the system stack (circuit, logic, archite...
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关键词
Resilience,Flip-flops,Benchmark testing,Computer architecture,Integrated circuit reliability,Reliability engineering
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