Guest Editors' Introduction: Emerging Challenges and Solutions in SoC Verification.

IEEE Design & Test(2017)

引用 2|浏览21
暂无评分
摘要
Verification has been one of the major bottlenecks in integrated circuit design process, which is exacerbated by the sheering design complexities nowadays. The increased design size is only one dimension of the growing complexities. Recent System-on-Chips (SoC) often feature multiple heterogeneous embedded processors and accelerators. While the heterogeneous architecture is more power efficient, i...
更多
查看译文
关键词
Special issues and sections,Computer security,Data mining,System-on-chip,Debugging,Complexity theory,Microprocessors,Formal verification
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要