Placement-based SER estimation in the presence of multiple faults in combinational logic

Susceptibility of modern ICs to radiation-induced faults constitutes a matter of great concern in the recent years. Particularly, the transient faults and their impact on the combinational logic remain an intriguing issue, since the evaluation of their behavior is quite significant, especially for critical systems, for the development of error-resistant techniques in design process. For an accurate estimation of Soft Error Rate both single and multiple transient faults should be regarded since the appearance of the latter is more noticeable as technology downscales. The proposed tool, i.e. SER estimator, is based on Monte-Carlo simulations, in order to obtain an accurate result, and takes advantage of placement information to identify the vulnerable parts of a circuit. Finally, the verification shows a fairly good accuracy compared with SPICE.