A power-area-efficient impedance sensor design for 10 × 10 microelectrode array sensing

2017 IEEE International Symposium on Circuits and Systems (ISCAS)(2017)

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摘要
This paper introduces the design of a power-area-efficient impedance sensor for a microelectrode array (MEA). The proposed architecture uses the quadrature phase integration method to estimate the magnitude and phase of the impedance-related current signal. By implementing a 12-bit 2-stage quantizer, a wide dynamic sensing range from 1 Hz to 100 kHz can be achieved. The sensor is designed in a 0.18 μm CMOS process, achieving <; 1.49% error in magnitude measurement and <; 0.81° error in phase measurement. The designed sensor consumes 478.8 μW at 1.8 V and occupies 0.04 mm 2 . A 10 × 10 highly-integrated impedance sensor array is enabled on-chip.
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关键词
Impedance sensor,EIS,area efficient,low power,quadrature phase integration,microarray,SAR ADC
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