A 0.65-V, 500-MHz Integrated Dynamic and Static RAM for Error Tolerant Applications.

The diminishing returns provided by voltage scaling have led to a recent paradigm shift toward so-called “approximate computing,” where computation accuracy is traded off for cost in error-tolerant applications. In this paper, a novel approach to achieving the power-performance-area versus data integrity tradeoff is proposed by integrating robust static memory cells and error-prone dynamic cells w...