MrDP: <u>m</u>ultiple-<u>r</u>ow <u>d</u>etailed <u>p</u>lacement of heterogeneous-sized cells for advanced nodes

Proceedings of the 35th International Conference on Computer-Aided Design, 2016.

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Abstract:

As VLSI technology shrinks to fewer tracks per standard cell, e.g., from 10-track to 7.5-track libraries (and lesser for 7nm), there has been a rapid increase in the usage of multiple-row cells like two- and three-row flip-flops, buffers, etc., for design closure. Additionally, the usage of multi-bit flip-flops or flop trays to save power...More

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