A 0.13 μm BiCMOS 10 Gb/s Adaptive Equalizer with Improved Power Supply Noise Rejection

Proceedings of the 2016 International Conference on Communication and Information Systems(2016)

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摘要
A 10 Gb/s continuous-time linear adaptive equalizer IC for 10 Gigabit short-reach optical interconnects using GLOBALFOUNDRIES (GF) 0.13 μm SiGe BiCMOS technology is described. The circuit consists of a continuous-time linear equalizer, an adaptation loop using spectrum balancing technique, an on-chip bandgap reference (BGR), and a low-dropout regulator (LDO). The adaptation loop is designed to minimize the inter-symbol interference (ISI) according to the variety of the characteristics of front-end devices. The BGR and LDO are designed and optimized to improve the power supply noise rejection (PSNR). The whole chip occupies an area of 900 μm × 850 μm and dissipates 106 mW from a 3.3 V power supply. The adaptive equalizer has a boosting factor up to 19 dB at 5 GHz and the PSNR is better than 35 dB over the frequency range up to 10 MHz.
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