CCATDC: A Configurable Compact Algorithmic Time-to-Digital Converter

High-resolution time-to-digital converters (TDCs) are important time measurement circuits in various high-speed electronic systems. The development of semiconductor technology improves the resolution of TDCs, but also introduces negative impact like process variations. Since modern TDCs are designed to achieve resolution of picosecond magnitude, process variations become a big concern. In this work, we present a configurable compact algorithmic TDC (CCATDC), that can digitize the analog time input into binary codes. Moreover, the proposed CCATDC can be configured to mitigate the impact from random process variations and transient noise. To achieve real-time circuit calibration and measurement, a Backpropagation based Machine Learning framework is proposed to configure the CCATDC circuit. In common TDC usage, it is assumed that the order of two timing signals is known, while in practice this is hardly true with input time difference of picosecond level. To overcome this problem, we propose a bidirectional design that is applicable to any input order. This method also increases the throughput by 50%. Experimental results demonstrate that our proposed CCATDC can achieve high conversion resolution (<; 1ps). Comparison with other TDC architectures shows that our proposed design consumes 75.4% less energy and 60% overhead.