Equalization scheme analysis for high-density spin transfer torque random access memory

As the memory density increases for the big-data processing, the sensing speed is degraded because of the increased parasitic capacitive load. Thus, the equalization (EQ) scheme that is capable of improving the sensing speed has now become essential. This paper examines the effectiveness of EQ scheme on the sensing speed of offset-canceling dual-stage sensing circuit (OCDS-SC) in terms of cells per bit line (CpBL). The simulation results show that the OCDS-SC with EQ scheme achieves 3 times faster sensing time than that without EQ scheme in case of CpBL of 128. Additionally, the EQ scheme becomes more effective for reducing the sensing time according to the increase in the number of CpBL.