Optimal Circuits for Parallel Bit Reversal.
DAC（2017）
摘要
In this paper, we develop novel parallel circuit designs for calculating the bit reversal. To perform bit reversal on 2n data words, the designs take 2k (k 更多
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关键词
parallel circuit designs,single-port buffers,single-port memory banks,continuous-flow bit reversal,parallel multipath FFT architectures,optimal circuits,parallel bit reversal,data words,memory words,2-to-1 multiplexers
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