Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups
DAC, pp. 18:1-18:6, 2017.
As VLSI technology scales to deep sub-micron, design for interconnections becomes increasingly challenging. The traditional bus routing follows a sequential bit-by-bit order, and few works explicitly target inter-bit regularity for signal groups via multilayer topology selection. To overcome these limitations, we present Streak, an effici...More
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