A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface.

Hyun-Wook Lim,Sung-Won Choi,Jeong-Keun Ahn, Woong-Ki Min,Sang-Kyu Lee,Chang-Hoon Baek,Jae-Youl Lee,Gyoo-Cheol Hwang,Young-Hyun Jun,Bai-Sun Kong

IEEE Journal of Solid-State Circuits（2017）

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摘要

This paper describes a 5.8 Gb/s adaptive integrating duobinary decision-feedback equalizer (DFE) for use in next-generation multi-drop memory interface. The proposed receiver combines traditional interface techniques like the integrated signaling and the duobinary signaling, in which the duobinary signal is generated by current integration in the receiver. It can address issues such as input data ...

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关键词

Decision feedback equalizers,Receivers,Boosting,Timing,Bandwidth,Decoding

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