Silicon Photonic Memory Interconnect for Many-Core Architectures.
2016 IEEE High Performance Extreme Computing Conference (HPEC)(2016)
Key words
silicon photonic memory interconnect,many-core architecture,scalable flexible memory interconnect,multiple memory stacks,processor-to-memory interconnect,many-core memory access,traffic hotspot,nonuniform memory access,NUMA,reconfigurable Silicon photonic memory interconnect,memory traffic,memory interface,STREAM speedup,fixed connection,four-port silicon photonic demultiplexer,on-chip fabric,OpenSoC,FPGA-emulated system,dynamic memory rewiring,wavelength routing
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