A DTC-Based Subsampling PLL Capable of Self-Calibrated Fractional Synthesis and Two-Point Modulation.

We present an analog subsampling PLL based on a digital-to-time converter (DTC), which operates with almost no performance gap (176/198 fs RMS jitter) between the integer and the worst case fractional operation, achieving -246.6 dB FOM in the worst case fractional mode. The PLL is capable of two-point, 10 Mbit/s GMSK modulation with -40.5 dB EVM around a 10.24 GHz fractional carrier. The analog no...