Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation
IEEE Trans. VLSI Syst., Volume 25, Issue 1, 2017, Pages 151-164.
Field programmable gate arraysAutomationEnginesGenetic algorithmsAlgorithm design and analysisMore(2+)
When dealing with partially reconfigurable designs on field-programmable gate array, floorplanning represents a critical step that highly impacts system’s performance and reconfiguration overhead. However, current vendor design tools still require the floorplan to be manually defined by the designer. Within this paper, we provide a novel ...More
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