256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers

IEEE Journal of Solid-State Circuits（2017）

引用 164|浏览43

暂无评分

摘要

A 48 WL stacked 256-Gb V-NAND flash memory with a 3 b MLC technology is presented. Several vertical scale-down effects such as deteriorated WL loading and variations are discussed. To enhance performance, reverse read scheme and variable-pulse scheme are presented to cope with nonuniform WL characteristics. For improved performance, dual state machine architecture is proposed to achieve optimal ti...

查看译文

关键词

Capacitance,Computer architecture,Loading,Calibration,Performance evaluation,Timing,Resistance

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要