Designing a virtual runtime for FPGA accelerators in the cloud
2016 26th International Conference on Field Programmable Logic and Applications (FPL)(2016)
摘要
FPGAs can provide high performance and energy efficiency to many applications; therefore, they are attractive computing platforms in a cloud environment. However, FPGA application development requires extensive hardware design knowledge which significantly limits the potential user base. Moreover, in a cloud setting, allocating a whole FPGA to a user is often wasteful and not cost effective due to low device utilization. To make FPGA application development easier, firstly, we propose a methodology that provides clean abstractions with high-level APIs and a simple execution model that supports both software and hardware execution. Secondly, to improve device utilization and share the FPGA among multiple users, we developed a lightweight runtime system that provides hardware-assisted memory virtualization and memory protection, enabling multiple applications to simultaneously execute on the device.
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关键词
virtual runtime,FPGA accelerators,cloud environment,hardware design knowledge,low device utilization,API,lightweight runtime system,hardware-assisted memory virtualization,memory protection
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