Detailed Placement For Modern Fpgas Using 2d Dynamic Programming

In this paper, we propose a 2-dimensional dynamic programming (DP) based detailed placement algorithm for modern FPGAs for wirelength and timing optimization. By tuning a control parameter, our algorithm can perform fast heuristic or exact optimization. Our algorithm further enables us to solve the single row placement problem optimally which was not possible with the previous DP approaches, while also reducing it's complexity to Theta (p.N.2(N)) from the naive Theta (p.N!) (where p is the average degree of a net). Experiments on industrial-scale benchmarks show promising results.