Can flexible, domain specific programmable logic prevent IP theft?

2016 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT)(2016)

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摘要
Fab-less design houses are outsourcing fabrication to third-party foundries to reduce costs. However, this has security consequences including intellectual property (IP) theft and piracy. Obfuscation techniques have been proposed to increase resistance to reverse engineering, IP recovery, IP theft and piracy. However, many obfuscation techniques through redesign or split manufacturing are costly in terms of manufacturing. We propose a High Level Synthesis and Analysis (HLSA) approach that leverages embedded programmable logic (EPL) to hide sensitive parts of the IP from a rogue foundry or a rogue actor in a foundry. While EPL was originally proposed to make the SoC programmable, we show that it can help a designer to thwart IP theft. Careful insertion of EPL increases the resistance to reverse engineering while managing the power consumption, area overhead and performance penalty. Our proposed security-aware HLSA design flow enables designers to explore this trade-off.
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关键词
IP theft,SoC,high level synthesis and analysis,embedded programmable logic
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