A Gb/S Parallel Block-Based Viterbi Decoder Convolutional Codes On Gpu

2016 8TH INTERNATIONAL CONFERENCE ON WIRELESS COMMUNICATIONS & SIGNAL PROCESSING (WCSP)(2016)

引用 9|浏览10
暂无评分
摘要
In this paper, we propose a parallel block-based Viterbi decoder (PBVD) on the graphic processing unit (CPU) platform for the decoding of convolutional codes. The decoding procedure is simplified and parallelized, and the characteristic of the trellis is exploited to reduce the metric computation. Based on the compute unified device architecture (CUDA), two kernels with different parallelism are designed to map two decoding phases. Moreover, the optimal design of data structures for several kinds of intermediate information are presented, to improve the efficiency of internal memory transactions. Experimental results demonstrate that the proposed decoder achieves high throughput of 598Mbps on NVIDIA GTX580 and 1802Mbps on GTX980 for the 64-state convolutional code, which are 1.5 times speedup compared to the existing fastest works on CPUs.
更多
查看译文
关键词
CUDA, convolutional codes, Viterbi algorithm, parallel decoding, SDR
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要