OSFA: A New Paradigm of Aging Aware Gate-Sizing for Power/Performance Optimizations Under Multiple Operating Conditions

IEEE Trans. on CAD of Integrated Circuits and Systems, Volume 35, Issue 10, 2016, Pages 1618-1629.

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Logic gatesDelaysAgingOptimizationDegradationMore(1+)

Abstract:

Modern systems-on-a-chip and microprocessors, e.g., those in smart phones and laptops, typically have multiple operating conditions, such as video streaming, Web browsing, standby, and so on. They will have different performance targets and run under different supply voltages. Gate sizing (with threshold voltage assignment) is a fundament...More

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