Power-On Digital Calibration Method For Delta-Sigma Adcs

A digital calibration method is presented for delta-sigma ADCs with focus on feedback DAC mismatch error correction. The DAC mismatch information is acquired, and then the nonlinearity is cancelled in the digital domain while the ADC operates. Unlike dynamic element matching which is commonly run between non-overlapping clock phases, the proposed method does not have the restriction and introduces no excess loop delay. The effectiveness of the proposed scheme was demonstrated with implementation of a third-order 15-level delta-sigma ADC.