Weighted Gate Elimination: Boolean Dispersers For Quadratic Varieties Imply Improved Circuit Lower Bounds

ITCS '16: Proceedings of the 2016 ACM Conference on Innovations in Theoretical Computer Science(2016)

引用 5|浏览35
暂无评分
摘要
In this paper we motivate the study of Boolean dispersers for quadratic varieties by showing that an explicit construction of such objects gives improved circuit lower bounds. An (n, k, s)-quadratic disperser is a function on n variables that is not constant on any subset of F-2(n) of size at least s that can be defined as the set of common roots of at most k quadratic polynomials. We show that if a Boolean function f is a (n, 1.83n, 2(9(n)))-quadratic disperser for any function g (n) = o (n) then the circuit size of f is at least 3.11n. In order to prove this, we generalize the gate elimination method so that the induction works on the size of the variety rather than on the number of variables as in previously known proofs.
更多
查看译文
关键词
Boolean circuits,dispersers,lower bounds
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要