Device Trends And Implications On Circuit Design In Advanced Cmos Technologies

C. H. Diaz,K. H. Fung,Ying-Keung Leung,Chung-Cheng Wu,Chih-Ping Chao, G. J. Chern,Wesley L. Lin,C. Lee,Fang-Shi Lai,Mi-Chang Chang,Yuan-Chen Sun

CICC: PROCEEDINGS OF THE IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE（2005）

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摘要

To conciliate scaling-driven fundamental material limitations with industry evolution requirements, flexible CMOS technologies and tighter interaction between process development and circuit/system design are needed to efficiently realize Systems on a Chip (SoC). This paper discusses issues associated with power supply scaling, performance-leakage power optimization including dynamic body / well bias, gate dielectric scaling, mobility enhancement by strained-Si, SRAM process and design interactions, digital and analog device tradeoffs, and HV I/O considerations in advanced CMOS technologies.

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关键词

CMOS integrated circuits,SRAM chips,integrated circuit design,power supply circuits,silicon,CMOS technologies,SRAM process,Si,SoC,analog device tradeoffs,circuit design,digital device tradeoffs,dynamic body/well bias,gate dielectric scaling,mobility enhancement,performance leakage,power optimization,power supply scaling,process development,systems on a chip

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