A multiobjective reconfiguration-aware scheduler for FPGA-based heterogeneous architectures

ReConFig, pp. 1-6, 2015.

Cited by: 4|Bibtex|Views13|Links
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Abstract:

Designing applications for heterogeneous systems, like Multiprocessor System-on-Chips (MPSoCs) based on Field Programmable Gate Arrays (FPGAs) is a complex task. In order to exploit all the capabilities of these systems, such as Partial Dynamic Reconfiguration (PDR) and hardware acceleration, the designer still has to develop large parts ...More

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