Systolic Array Architectures for Sunar–Koç Optimal Normal Basis Type II Multiplier

IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2015)

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摘要
We present linear and nonlinear techniques for design exploration of an iterative algorithm. The nonlinear techniques allow control of processor workload and control of communication between processors. The algorithm considered is the Sunar-Koç optimal normal basis type II multiplication algorithm. Six systolic arrays are obtained. General formulas are provided for each design so that the operatio...
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关键词
Arrays,Vectors,Indexes,Processor scheduling,Iterative methods,Algorithm design and analysis,Equations
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