Extraction and modeling of layout-dependent MOSFET gate-to-source/drain fringing capacitance in 40nm technology

•A novel test key is designed to separate gate-to-source/drain fringing capacitance (Cf) and gate to contact capacitance (Cco).•Layout-dependence is modeling in Cf based on silicon data using 40nm CMOS technology.•Modeling equations are precise and efficient.•Layout-dependent Cf model are more accurate to silicon in circuit simulation.