SON (Silicon On Nothing) PLATFORM FOR ULSI ERA: TECHNOLOGY&DEVICES

In this article is presented the new SON process, which key point ties in the transfer of the lattice continuity from a bulk Silicon substrate via a SiGe layer to the Silicon cap layer, both of these layers being obtained by epitaxy. The thin SiGe layer is next removed from underneath the Si cap in an isotropic plasma-assisted chemical dry-etching. The mono-crystalline Si cap layer resulting from this process lies on an air-gap, which gives the name (Silicon On Nothing) to the process. Depending on application, this air-gap may be refilled with a dielectric or with a gate material for double gate applications. In both cases, the thickness of the Si cap as well as that of the air-gap (filled by the dielectric for single gate applications) may be in the range of a few nanometers with a control in the range of the epitaxy process capability. In this article we present the SON process and its implementation to MOSFETs devices and circuits. This development effort converges towards an SON technological platform, allowing easy co-integration of SON and bulk transistors, Gate All Around or multi-gate devices.