Degradation and Full Recovery in High-Voltage Implanted-Gate SiC JFETs Subjected to Bipolar Current Stress

Victor Veliadis,Harold Hearne,Eric J Stewart,Megan Snook,Woohyuk Chang,Joshua D Caldwell,H C Ha,Nabil Elhinnawy,Pavel Borodulin,Robert S Howell,Damian Urciuoli,Aivars J Lelis,Charles Scozzie

IEEE Electron Device Letters（2012）

引用 23|浏览3

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摘要

Electron-hole-recombination-induced stacking faults (SFs) have been shown to degrade the electrical characteristics of SiC power pin and MPS diodes and DMOSFETs with thick drift epitaxial layers. In this letter, we investigate the effects of bipolar current stress on the electrical characteristics of ion-implanted gate vertical-channel JFETs with 100-μm drift epilayers. JFETs are stressed at a fix...

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关键词

JFETs,Logic gates,Degradation,Annealing,Stress,Silicon carbide,Electric variables

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