Assembly and Scaling Challenges for 2.5D IC

2.5D technology is gaining acceptance in the industry and an increasing number of products are beginning to enter volume manufacturing. As with all interconnect technologies, the key metrics driving the transition include higher computing performance, lower power consumption, smaller form factor, increased bandwidth and reduced latency (interconnect delay). In order to transition from today's low volumes to High Volume Manufacturing (HVM), the concerns of warpage control, thermal dissipation, cost (yield and throughput) and overall technology scalability for future generations need to be addressed rapidly. The solutions in these relatively new packaging technologies encompass design/layout, material, process and integration choices. With these concerns as a backdrop, our paper will discuss our approach to optimizing 2.5D assembly for HVM. We will begin with a review of our test vehicle and our overall choices of substrate, interposer and die dimensions. Three different 2.5D assembly approaches that have been investigated at Invensas for warpage control, ease of process, and impact on yield and reliability will be discussed in detail. We will present our results from critical areas including temporary bonding, thermo-compression bonding, mass reflow, thin wafer/die handling, flux, underfill and molding. This paper will present our understanding of the underlying principles governing the technology bottlenecks in advanced packaging and the three flows will be compared with an assessment of their advantages and disadvantages. In addition, we will also provide the results of our cost modeling work. We will finish by making recommendations for an optimized assembly process flow.