Characterization and model of on-chip flicker noise with deep Nwell (DNW) isolation for 130nm and beyond SOC

M T Yang,Darryl C W Kuo,C W Kuo,Y J Wang,Patricia P C Ho,T J Yeh,Sally Liu

international conference on microelectronic test structures（2005）

引用 8|浏览4

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摘要

An investigation of the flicker noise, by exploring 0.13 /spl mu/m and beyond MS/RF CMOS technology, was carried out for wireless system-on-a-chip (SOC) applications. The on-chip flicker noise of various components are characterized and accurately modeled. The feasibility of deep N-well isolation to suppress substrate coupling of analog nodes from digital clock noise is also demonstrated.

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关键词

crosstalk,radio frequency,soc,noise measurement,system on a chip,cmos integrated circuits,cmos technology,semiconductor device modeling,chip,system on chip,flicker noise,phase noise

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