VLSI Design of Reconfigurable Cipher Coprocessor Supporting both Symmetric and Asymmetric Cryptographic Algorithms

A novel reconfigurable cipher coprocessor (RCP) is designed with supporting both symmetric and asymmetric algorithms. First, a memory-sharing S-box is proposed to provide a reconfigurable S-box with reduced hardware resources. Then, arbitrary permutation unit, reconfigurable arithmetic operation unit, and shift unit are designed. All the operation units are combined with control module, configuration registers, data interconnect bus, and other parts to form a RCP coprocessor, which can implement different cryptographic algorithms by changing the configuration to adapt different application scenarios. The reconfigurable cipher coprocessor that can realize DES, 3DES, AES, IDEA, RC6, and RSA algorithms is integrated with a 32-bit CPU, 32K SRAM, and other peripherals. The simulation results show that the RCP has advantages in resource usage and flexibility with a relevant performance.