Digital Subthreshold For Ultra-Low Power Operation: Prospects And Challenges

LOW-POWER VARIATION-TOLERANT DESIGN IN NANOMETER SILICON(2011)

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摘要
This chapter provides a brief overview of the principles and challenges of ultra-low power circuit design in the subthreshold region of operation. Design principles at all levels of hierarchy, namely, devices, circuits, and architecture need to be evaluated for maximum power gains. Brief description of SRAM design techniques as well as alternative architectures for lower power has also been discussed.
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