62-Ghz 24-Mw Static Sige Frequency Divider

Herbert Knapp,M Wurzer,K Aufinger,Josef Bock,T F Meister

2004 TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS, DIGEST OF PAPERS（2004）

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摘要

We present a static frequency divider with a divide ratio of 16. The circuit is realized in current-mode logic (CML) and operates up to a maximum frequency of 62 GHz. The first master-slave flip-flop uses shunt peaking and consumes only 4 mW from a 2 V supply. The total supply current including all four divider stages and buffers is 12 mA. The circuit is manufactured in a 200-GHz f(T) SiGe bipolar process.

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关键词

frequency divider, current-mode logic, shunt peaking, SiGe bipolar technology

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