A sub-THz folded substrate integrated waveguide in IBM 130 nm CMOS process

This paper presents a compact sub-THz substrate integrated waveguide (SIW) interconnect that is designed in IBM 130 nm digital CMOS process. The footprint of the proposed SIW design is smaller than previous implementations through the application of a folded structure. The TE10 mode of the waveguide operation is excited using a current-loop excitation technique that imposes minimum layout area and is fully embedded inside the waveguide structure. Design formulas as well as full-wave simulation results are presented which show a promising performance over the frequency range of 180 GHz-220 GHz.