Essential - integration of ESD verification methodologies
Electrical Overstress Electrostatic Discharge Symposium(2015)
摘要
Integrating DRC-like and Topology checks and in addition, incorporation of clamp interconnect resistance from Interconnect checks during ESD verification of SoC is presented. The benefit of integrating these three static methodologies together is shown by the detection of new critical constructions and the automatic waiving of uncritical ones.
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关键词
ESD verification methodologies,clamp interconnect resistance,interconnect checks,SoC
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